Source: Huaqiang Electronic Network Author: SiFive
RISC-V is unstoppable, "said Professor Krste Asanovic, the main inventor, co-founder and chief architect of RISC-V, who has been in China for several years. During the recently concluded 2023 SiFive RISC-V China Technology Forum tour in Beijing, Shanghai, and Shenzhen, he consistently emphasized this core idea.
The RISC-V architecture, which started in 2010, has passed its initial dormancy period and achieved a shipment volume of 10 billion in 2022. According to Professor Asanovic‘s prediction, RISC-V will experience rapid growth in the next five years, and the shipment volume of RISC-V processor cores will reach 80 billion by 2025, which is still a conservative estimate. Mr. Gang Zhijian, Senior Vice President of Enterprise Marketing and Business Development of SiFive, also exclaimed at the conference, "The membership of RISC-V International Foundation has grown from 435 in December 2019 three and a half years ago to nearly 4000 now, almost a tenfold increase. RISC-V is developing too fast
Figure 1. Professor Krste Asanovic, the main inventor and co-founder and chief architect of RISC-V, emphasized the unstoppable future of RISC-V at the 2023 SiFive RISC-V China Technology Forum
In China, RISC-V is highly anticipated. China has always been the world‘s largest consumer of computing power, but it is not a strong producer of computing power. The emergence of RISC-V has given China the opportunity to participate in global competition in computing power, just like the 5G standard in the communication era. As the inventor and leading manufacturer of RISC-V, SiFive has always focused on investing in RISC-V, keeping pace with the times and iterating to produce the industry‘s most comprehensive product series. The purpose of holding a three place tour forum in China is to showcase its capabilities in the RISC-V field to the domestic RISC-V industry circle, and to announce SiFive‘s determination to personally operate the Chinese market and business. This has also attracted nearly 2500 industry professionals to sign up and participate in the conference, explore China‘s RISC-V development plans, and witness how SiFive leads the storm circle of open source ecology and future computing paradigms in its own way.
Why is RISC-V architecture an inevitable choice in the era of vertical semiconductor business models?
The Instruction set architecture is highly consistent with the Matthew effect. At the same time, the competition of the Instruction set architecture is not only technical competition, but more business model competition. The reason why RISC-V is unstoppable is that the industry is eager for a new business model and a stable, open source and open Instruction set architecture that can be used in all fields.
Professor Asanovic believes that each era will have its own dominant instruction set, such as the x86 architecture in the microprocessor era, the ARM architecture family in the mobile Internet era. Under the current more vertical and in-depth semiconductor business model, industry leaders such as Apple and Tesla are all defining the product design of silicon systems. The flexible and open source RISC-V architecture is born to conform to the era of "Vertical Semiconductor".
Figure 2. Professor Asanovic points out that selecting RISC-V is an inevitable trend in the era of Vertical Semiconductor
What‘s more, the advantages of RISC-V‘s endogenous Instruction set architecture are becoming increasingly obvious. The excellent PPA (Power/Performance/Area) performance and more competition based on the open source architecture are also stimulating more innovation... High performance processors and better ecological support are just around the corner.
Figure 3. RISC-V develops rapidly and its ecosystem rapidly rises
100% investment in RISC-V+to expand investment in China, SiFive debuted in China with the latest full line product series
More than 100 customers worldwide; More than 350 design schemes; Eight of the world‘s top ten semiconductor manufacturers have already partnered with SiFive; More than 600 employees, over 85% of whom are research and development related high-tech talents, of which more than 100 employees have doctoral degrees. SiFive uses a series of data to reiterate its original intention about RISC-V.
Figure 4. Mr. Gang Zhijian, Senior Vice President of Enterprise Marketing and Business Development, SiFive, expressed his determination to fully invest in RISC-V and personally cultivate the Chinese market
SiFive has been firmly committed to RISC-V from the beginning and is committed to helping industries around the world accelerate the ‘RISC-V transformation‘, "said Mr. Gang Zhijian." We have laid out the most comprehensive RISC-V IP products. In addition, not only the CPU, but also the software ecosystem around the CPU, such as Multi core and Multi cluster. Our SiFive software team is following up to output a complete set of solutions to help customers accelerate their landing
Increasing investment in China is another focus of the SiFive RISC-V China Technology Forum to industry officials. Based in Shanghai as the headquarters of the China region, SiFive has built a local team and ecological partnership ecosystem. At the forum, SiFive announced that it will personally operate the Chinese market in the future and fully demonstrated its capability map to the Chinese industry.
Figure 5. SiFive constructs the most comprehensive IP product matrix system in the RISC-V field
In just 3 years, SiFive‘s product roadmap has expanded from the top 5 CPU IP products under the previous Essential series to the most comprehensive product matrix in the RISC-V industry with multiple product lines including Automotive, Intelligence, and Performance.
AI+high-performance+automotive has become a key area for RISC-V development, with SiFive‘s full line layout
When discussing which markets will become the focus of RISC-V‘s future development, Mr. Gang Zhijian summarized four points on site: firstly, in areas with high requirements for power efficiency, such as the mobile market, RISC-V‘s power efficiency will be improved by 30% to 40% compared to ARM. At the same time, Google has officially announced that RISC-V will become a Tier-1 architecture platform supported by Android; Secondly, in the automotive field, electrification and autonomous driving have completely overturned the automotive industry, and the complete renovation from hardware to software will give birth to a brand new ecology; Thirdly, AI, especially generative AI and large language models, has increased the demand for programmability; Fourthly, specific key areas such as NASA have adopted RISC-V in large-scale aerospace and industrial projects. These four areas will not only become the key to the future breakthrough of RISC-V, but also important fulcrums for SiFive to take the lead in layout and seize the market.
RISC-V High Performance Navigator SiFive Performance Series - According to Mr. Wang Kaihuai, the Chief Engineer of SiFive, the Performance Series, which pursues computational density, is currently the high-performance leader in the RISC-V field. From the simple wearable market, smart home products to mobile and network devices with higher performance requirements are all target applications of SiFive Performance.
It should be emphasized that the P400 Series and P600 Series are the first to comply with the RVA22 specification. As is well known, the importance of the RVA22 specification lies in addressing the issue of RISC-V fragmentation, which also requires future applications to comply with this specification. At the RISC-V European Summit in early June, Google also revealed the RISC-V hardware specifications that the future first version of Android 15 needs to support. SiFive‘s P400 Series and P600 Series are currently the only fully compliant RISC-V CPU IPs on the market.
Figure 6. Performance/efficiency comparison of SiFive P470, P670, and Arm products
SiFive also showcased the latest version of Android in real-time in the exhibition area, where it can demonstrate the demo of Android 15 within AOSP, making it convenient for future customers to build higher-level applications. Although it is only a simple development board, since Google announced at the end of last year that Android will support the RISC-V instruction set, and SiFive updated this version of the demo, it can be seen that the combination of Android and RISC-V is not difficult. The most important thing is the ecological support and the empowerment of the RISC-V instruction set business model. According to experts, there will be Android based technology products on the market as soon as 2024.
Figure 7. Demo of SiFive‘s debut Android 15 on RISC-V in Chinese Mainland
In addition, Mr. Sun Chan (Chen Xinzhong), CTO of Deep Digital Intelligence, also presented Professor Krste Asanovic with a RISC-V laptop - ROMA on behalf of the company at this forum. As the world‘s first RISC-V laptop, ROMA is led by the RISC-V Foundation and developed by Deep Digital Intelligence and debugged by Jianshi Technology. It is a cutting-edge RISC-V laptop equipped with the openKylin operating system, aimed at allowing users to experience native RISC-V development and RISC-V software ecosystem. The birth of ROMA also fully demonstrates the unlimited possibilities of RISC-V in China and even globally to the industry, and puts forward higher expectations for industry partners to expand the application of RISC-V.
Figure 8. Mr. Sun Chan, CTO of Deep Digital Intelligence, presented Professor Asanovic with RISC-V laptop ROMA at the Shenzhen Forum
At this China Tour Forum, SiFive announced for the first time that P870-A, the highest performance representative of the Automotive series in the industry, is accelerating the transformation of the automotive industry by defining the characteristics of the automotive era with software. More ADAS functions are poised to be launched on the ground. According to statistics, from 2020 to 2030, the annual compound growth rates of in car SoCs and MCUs were 19% and 9%, respectively, "said Mr. Lin Zongmin, Senior Manager of SiFive Product Marketing. The transition from traditional distributed electronic and electrical architecture to domain control architecture not only enables unified software development and significantly improves the flexibility of vehicle digital upgrades, but also puts forward higher requirements for high-performance central computing..
Figure 9. SiFive Automotive product series roadmap display
SiFive has launched a series of scalable products from MCU to High-performance computing in the automotive market, including P870-A, the highest performance product series of the Performance series.
According to Mr. Lin Zongmin, P870-A is an application scenario for automatic driving, central gateway and other applications that need High-performance computing. This product is also a customer of SiFive, a major global manufacturer of automotive chips, who actively proposes hardware specifications to SiFive. It can be said that P870-A has the highest performance among the authorized RISC-V processor IPs on the market in terms of automotive processors.
SiFive Intelligence series: Open standards and open source are the foundation of generative AI chips - at the beginning of this year, generative AI swept the world and demonstrated its amazing capabilities in solving seq to seq tasks, and these large models will give data centers an infinite market and future in the next 20 years. Focusing on the moment, how to design an AI chip based on the neural network model that has not yet been invented becomes the key. Mr. Li Benzhong, senior director of SiFive AI/ML products, believes that open standards and open source are the basis of generative AI chips. Flexible hardware architecture, stable and efficient Programming tool chain, RISC-V, MLIR and LLVM will provide customers with the most stable scientific and technological foundation.
Figure 10. SiFive AI Important Product X280
Take X280 as an example. This product has been adopted by many front-line customers around the world, including Google. Later, these customers will also open source related tools, software packages, frameworks and Codebase to benefit the industry. X280 is therefore defined as the most successful processor product of RISC-V in the field of artificial intelligence.
At the booth at the same time as the forum, SiFive also presented a demo of its AI/ML solution for portrait/item recognition based on X280 products. Google publicly launched the complete AI/ML solution OpenXLA under the MLIR framework in February 2023. SiFive has successfully integrated the OpenXLA/IREE software stack, and the SiFive Intelligence series is currently the only software and hardware solution on the market that supports OpenXLA RISC-V. This demo also announces to the industry that SiFive has the ability to quickly enable customers to enter various AI application markets.
Figure 11. Demo for portrait/item recognition based on AI/ML solution exhibited simultaneously at SiFive booth
Software! Software! Software! ", SiFive collaborates with partners to build the core of the RISC-V ecosystem
During the special discussion session of the forum, the audience asked Professor Asanovic what the three key elements of RISC-V‘s future development were. Professor Asanovic replied, "Software! Software! Software!" Indeed, for RISC-V, the open source of instruction sets is not enough. To achieve agile development and rapid iteration, the entire industry needs to include open source processors, open source Toolchain, open source IP, open source SoCs, operating systems Comprehensive ecosystem including compilation support. Especially for the high-performance chip field, RISC-V still needs the support of Unity Operating System, algorithm library and other software ecology.
Therefore, when introducing RISC-V from embedded to application processor and development tools, Mr. Zhang Yan, the chief field application engineer of SiFive, first emphasized that "RISC-V has the fastest growing software ecosystem." SiFive can be said to be the most powerful contributor to RISC-V software tools and operating systems, providing compilers (GCC, LLVM, PoCL), Debugger, utility libraries (GDB, binutils, newlib, glibc), Linux kernel ports ISS model (QEMU), etc. Today, all SiFive software tools will be provided for free without any license key control
Of course, the ecological construction of RISC-V requires the joint efforts of industry participants, and SiFive is well aware that this is not easy. From the beginning, it has focused on the construction of the ecosystem, and currently has built its own ecosystem in software tools, operating systems, and other dimensions.
Figure 12. SiFive software tools, operating system, and IP partner examples
At this forum, numerous ecological partners, such as Synopsys, Imperas, Silksin, Core Band Technology, IAR, LAUTERBACH, Green Hills Software, made appearances together. Through keynote speeches or demo presentations, they elaborated from their own perspectives on the assistance of RISC-V ecological construction and how to collaborate with SiFive. As a leading provider of IP technology from verification to implementation in the industry, Synopsys will strengthen comprehensive cooperation with leading enterprises in the RISC-V ecosystem, such as SiFive, in addressing the emerging CPU ecosystem of RISC-V. Through a series of collaborations, Synopsys will help customers quickly solve various challenges in the verification and implementation process of using RISC-V CPUs in SoC design. Imperas is committed to developing RISC-V simulation technology and processor validation, and collaborates with SiFive to develop a series of simulation models suitable for software and hardware developers, further helping customers reduce development risks and accelerate the product launch process.
Figure 13. SiFive‘s ecological partner booth also attracts attention
As for how to realize RISC-V micro rack analysis and optimization of automotive architecture level solutions, Silcone mainly recommended its Genesis core craftsman platform. In this architecture platform, with the help of software characteristics, Silcone has its own standard model library from many fields such as avionics, Software-defined radio, multimedia network, automatic driving, semiconductor, etc., helping customers build their own architecture like building blocks. In addition, as a breakthrough multi standard chip platform, experts in chip technology also claim that its WAVE? The chip platform will completely change the design of baseband chips, combining hardware speed and software flexibility, and provide a new architectural method for designing baseband ASICs for RISC-V.
The RISC-V ecosystem is sweeping in with an unimaginable acceleration. As Mr. Gang Zhijian summarized in his speech, "The advantages of RISC-V are simplicity, open source, low power consumption, and modularity. Full participation and competition will bring more momentum and vitality to the RISC-V field, which is an advantage that no other architecture can match
About SiFive
As the inventor and leading manufacturer of RISC-V, SiFive is changing the paradigm of future computing, leading the unlimited potential of RISC-V to the world‘s highest performance and data-intensive applications. SiFive has built an unparalleled computing platform that can successfully assist numerous technology leaders around the world in every market segment of chip design, from innovative ideas, optimization to perfection, and launching the most advanced chip design solutions, covering application fields such as artificial intelligence, machine learning, automotive electronics, data centers, mobile computing, and consumer electronics. SiFive walks with you to create the infinite future of RISC-V.
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