The following are 24 tips for reducing noise and electromagnetic interference in PCB design, summarized after years of design:

    (1) If you can use low-speed chips, you don‘t need high-speed ones. High speed chips are used in critical areas.

    (2) The method of stringing a resistor can be used to reduce the jump rate of the upper and lower edges of the control circuit.

    (3) Try to provide some form of damping for relays, etc.

    (4) Use the minimum frequency clock that meets system requirements.

    (5) The clock generator should be as close as possible to the device using the clock. The quartz crystal oscillator shell should be grounded.

    (6) Circle the clock area with a ground wire and keep the clock wire as short as possible.

    (7) The I/O driver circuit should be as close as possible to the edge of the printed board to allow it to leave as soon as possible. The signal entering the printed circuit board needs to be filtered, and the signal coming from the high noise area also needs to be filtered. At the same time, a series terminal resistor method is used to reduce signal reflection.

    (8) The useless end of MCD should be connected high, or grounded, or defined as the output end. The end that should be grounded to the power supply on the integrated circuit should be connected, and should not be suspended.

    (9) The input end of the unused gate circuit should not be suspended. The positive input end of the unused operational amplifier should be grounded, and the negative input end should be connected to the output end.

    (10) Try to use 45 fold wiring instead of 90 fold wiring for printed boards to reduce the external transmission and coupling of high-frequency signals.

    (11) Printed boards are divided according to frequency and current switching characteristics, and noise components should be further away from non noise components.

    (12) Single panel and double-sided boards should use single point power supply and single point grounding. The power cord and ground wire should be as thick as possible. If it is affordable, multi-layer boards should be used to reduce the capacitance inductance of the power supply and ground.

    (13) Clock, bus, and chip selection signals should be kept away from I/O cables and connectors.

    (14) The analog voltage input line and reference voltage terminal should be as far away from the digital circuit signal line as possible, especially the clock.

    (15) For A/D devices, it is preferable to unify the digital and analog parts rather than cross them.

    (16) The clock line has less interference perpendicular to the I/O line than parallel I/O lines, and the clock component pins are away from the I/O cable.

    (17) The component pin shall be as short as possible, and the Decoupling capacitor pin shall be as short as possible.

    (18) The key lines should be as thick as possible and protective areas should be added on both sides. The high-speed line should be short and straight.

    (19) Lines sensitive to noise should not be parallel to high current or high-speed switching lines.

    (20) Do not route wires under quartz crystals or noise sensitive devices.

    (21) Do not form current loop around weak signal circuit and low-frequency circuit.

    (22) Do not form a loop for signals. If unavoidable, keep the loop area as small as possible.

    (23) Each integrated circuit has a Decoupling capacitor. A small high-frequency bypass capacitor shall be added to each Electrolytic capacitor.

    (24) Use high-capacity tantalum capacitors or Juku capacitors instead of Electrolytic capacitor as circuit charging and discharging energy storage capacitors. When using tubular capacitors, the casing should be grounded.